Crystals have become very expensive (or so it seems), and the cost consigns some older radios to scrap. That said, I do recall buying crystals for $6 from Jan Crystals around 1967, which with Australian inflation over the period equates to $90 in 2023.
This article looks at an inexpensive substitute for the 1647kHz LSB crystal in a Codan 8525 transceiver which shipped as USB only in commercial service (yep, hams are out of step with the commercial comms world).
Above is a ‘si5351 module’ from Aliexpress for less than $3, about a tenth the price of the Adafruit module. Only one output will be used, the SMA jacks need not be used, but one was attached to channel 0 for testing the prototype.
This module appears to be a clone of the early Adafruit module, schematic above. Note the level converters and pull up resistors on SDA and SCL. In fact it is fitted with a Chinese near clone of the Si5351, a MS5351M… and the chip is defaced so the MS cannot the read, but the trailing M is a give away.
The crystal specified in Adafruit’s build list has accuracy and stability of 30ppm. Of four module purchased, one did not produce any output, the other three produced output on channel 0, and frequency on the prototype was 138ppm high, the others were similar.
Even if the crystal was 30ppm, it would not be sufficient for most purposes, so a process of individual calibration will probably be necessary.
Above, individual calibration of the prototype to compensate for its +138ppm frequency error. This will almost certainly drive most instances into fraction N division and the attendant increase in phase jitter.
Other options exist like grafting a TCXO to the module. The datasheet does not provide for external clock in on the -A chip, but reports are that it works with external clock on XA pin.
Configuration
Skyworks Clockbuilder Pro was used to develop the configuration.
Above the frequency configuration screen.
Above, output is set to 8mA initially, changed to 2mA for testing.
The si5351 registers are volatile, they need to be programmed each time the chip is powered up. The chips would seem to contain a non-volatile memory which can be programmed by the factory, possibly also by ‘approved’ customers… but as yet details have not been found. The boards use the Chinese MS5351M, things may well be different in so many ways.
Options for programming
Prototyping
Two options for desktop programming of the prototype module were explored.
- Bus Pirate for prototype testing the register sets; and
- i2ctools for Linux.
Bus Pirate v3, v4
A Python script was written to parse the exported configuration from Clockbuilder Pro and create the Bus Pirate commands to be pasted into a terminal emulator (Teraterm v5).
Teraterm was used as it allow specification of a pause at the end of each line to allow Bus Pirate to execute the command, Putty cannot do this.
m4 2 2 2 I2C (mod spd)=( 1 1 ) Ready I2C>e 2 3.3V on-board pullup voltage enabled I2C>W POWER SUPPLIES ON Clutch engaged!!! I2C>P Pull-up resistors ON I2C>i Bus Pirate v4 Firmware v6.3-beta1 r2151 DEVID:0x1019 REVID:0x0003 (24FJ256GB106 A5) http://dangerousprototypes.com CFG0: 0xFFFF CFG1:0xFFFF CFG2:0xFFFF *----------* Pinstates: #12 #11 #10 #09 #08 #07 #06 #05 #04 #03 #02 #01 GND 5.0V 3.3V VPU ADC AUX2 AUX1 AUX - - SCL SDA P P P I I I I I I I I I GND 4.98V 3.31V 3.20V 0.00V L L L H H H H POWER SUPPLIES ON, Pull-up resistors ON, Vpu=3V3, Open drain outputs (H=Hi-Z, L=GND) MSB set: MOST sig bit first, Number of bits read/write: 8 a/A/@ controls CS pin I2C (mod spd)=( 1 1 ) *----------* I2C>[ 0xc0 0x02 0x53 0x00 0x20 I2C START BIT WRITE: 0xC0 ACK WRITE: 0x02 ACK WRITE: 0x53 ACK WRITE: 0x00 ACK WRITE: 0x20 ACK I2C>[ 0xc0 0x07 0x00 I2C START BIT WRITE: 0xC0 ACK WRITE: 0x07 ACK WRITE: 0x00 ACK I2C>[ 0xc0 0x0f 0x00 0x0c 0x8c 0x8c 0x8c 0x8c 0x8c 0x8c 0x8c I2C START BIT WRITE: 0xC0 ACK WRITE: 0x0F ACK WRITE: 0x00 ACK WRITE: 0x0C ACK WRITE: 0x8C ACK WRITE: 0x8C ACK WRITE: 0x8C ACK WRITE: 0x8C ACK WRITE: 0x8C ACK WRITE: 0x8C ACK WRITE: 0x8C ACK I2C>[ 0xc0 0x1a 0x00 0x01 0x00 0x10 0x00 0x00 0x00 0x00 I2C START BIT WRITE: 0xC0 ACK WRITE: 0x1A ACK WRITE: 0x00 ACK WRITE: 0x01 ACK WRITE: 0x00 ACK WRITE: 0x10 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK I2C>[ 0xc0 0x2a 0x00 0x01 0x00 0x2b 0x00 0x00 0x00 0x00 I2C START BIT WRITE: 0xC0 ACK WRITE: 0x2A ACK WRITE: 0x00 ACK WRITE: 0x01 ACK WRITE: 0x00 ACK WRITE: 0x2B ACK WRITE: 0x00 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK I2C>[ 0xc0 0x5a 0x00 0x00 I2C START BIT WRITE: 0xC0 ACK WRITE: 0x5A ACK WRITE: 0x00 ACK WRITE: 0x00 ACK I2C>[ 0xc0 0x95 0x00 0x00 0x00 0x00 0x00 0x00 0x00 I2C START BIT WRITE: 0xC0 ACK WRITE: 0x95 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK I2C>[ 0xc0 0xa2 0x00 0x00 0x00 0x00 I2C START BIT WRITE: 0xC0 ACK WRITE: 0xA2 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK WRITE: 0x00 ACK I2C>[ 0xc0 0xb7 0xd2 ] I2C START BIT WRITE: 0xC0 ACK WRITE: 0xB7 ACK WRITE: 0xD2 ACK I2C STOP BIT I2C>p Pull-up resistors OFF I2C>w Clutch disengaged!!! POWER SUPPLIES OFF I2C>i Bus Pirate v4 Firmware v6.3-beta1 r2151 DEVID:0x1019 REVID:0x0003 (24FJ256GB106 A5) http://dangerousprototypes.com CFG0: 0xFFFF CFG1:0xFFFF CFG2:0xFFFF *----------* Pinstates: #12 #11 #10 #09 #08 #07 #06 #05 #04 #03 #02 #01 GND 5.0V 3.3V VPU ADC AUX2 AUX1 AUX - - SCL SDA P P P I I I I I I I I I GND 0.01V 0.26V 0.00V 0.00V L L L L L L L POWER SUPPLIES OFF, Pull-up resistors OFF, Vpu=3V3, Open drain outputs (H=Hi-Z, L=GND) MSB set: MOST sig bit first, Number of bits read/write: 8 a/A/@ controls CS pin I2C (mod spd)=( 1 1 ) *----------* I2C>
Above is a console log of programming using Bus Pirate.
i2ctools for linux
A Python script was written to parse the exported configuration from Clockbuilder Pro and create and run the needed ic2tools commands on a Raspberry Pi which has I2C interface readily accessible on the header connector.
… more to come.
Production
There are various designs on the ‘net for controllers.
I have chosen to develop my own based on PllLdr. PllLdr was designed as a very flexible loader for a wide range of PLLs that use an SPI like interface (older PLL chips and PLL modules tend to be SPI like).
So, the concept is similar, some of the code is used for the new PllLdri which runs on ATTinyx4 and ATTinyx5 chips.
All configuration data is contained in EEPROM.
Above is a screen shot of the EEPROM data structures parsed using the Structure Viewer of HHD Hex Editor. In this example, two register configurations are stored and selected by the ‘sel’ input to the chip, though for most applications only one configuration will be stored.
Initial tests
Above is a logic trace of the I2C communications, it takes about 7ms for the full sequence to program just channel 0.
Above is a chart of the spectral purity of the output at 1647kHz, the FFT bin size is 168Hz. The spectral purity would appear to be quite adequate for so-called ‘digital modes’ like FT8 etc.
Above is a summary of frequency measurement from late afternoon to coldest time in the morning, 20-10° ambient, and frequency changed ~-2Hz, so the temperature coefficient looks like around -0.2Hz/° which hints that over a range 0-60°, frequency might change around -12Hz or +4 to -8 Hz relative to the frequency at 20°. That should be acceptable for this project application.
Long term stability is another matter.
Next
I have ordered some little dev boards for ATTiny85 with DIP sockets to marry to the Si5351 module. The DIP socket will allow removal of the chip for programming in a device programmer… more to follow.