A generic run on timer using an ATTINY25

At Improved cooling for the MFJ-949E I described a modification to the ATU to improve its cooling using a fan and run on timer.

The run on timer described was based on a Chinese STC15F104E DIP8 8051 like microcontroller.

Because the programming tools for the STC chips work so poorly, and the lack of documentation of their protocol, there is no simple way to update only the calibration data in EEPROM. I have ported the algorithm to an ATTINY25 which doesn’t cost a lot more but had a much better development environment and a range of tools to allow EEPROM update without overwriting the FLASH image, and as well it will run my bootloader, ATB.

This article describes a generic run on timer based on an Atmel AVR chip, a ATTINY25 though the code will also run in ATTINY45 and ATTINY85.


The circuit is very simple, the DC output from the forward power detector is connected to the input pin which turns the BC548C transistor on at input voltage greater than about 0.7V. The high value of base resistor ensures very light loading of the forward power detector.

The MCU contains the logic and the OUTPUT pin is used to switch a 2N7000 hexfet to operate the fan. The MCU uses the watchdog timer at about 120kHz for a clock to minimise harmonics and RF noise (since it is housed inside the ATU cabinet). The processor is put into idle mode whenever possible which further reduces radio noise.

The run on timer runs for a period defined by EEPROM calibration data after it is triggered, and it is retriggerable. For this application, the time is set to 900s.

The optional parts are for a override facility, if power is removed for 2s and re-applied, the fan will turn on until the ROT is powered off.

Inverted output is on pin 2.


Above, the run on timer is assembled on a small piece of Veroboard. The original fan connector plugs onto the three pin connector at upper right, ground, 12V and input connect to the Vero pins on the board.


Above is the underside of the veroboard.

The run on timer mounts to the chassis lip using two threaded pillars as shown in the original article.


Above is a variation using an IRF510 FET for higher current capability. Note there is a wire link from source to gound hidden by the FET in this view.


Above, the underside using the IRF510 has an extra track cut near the FET source pin.

On test, the timer has worked reliably and no radio noise is detectable over HF.


Offset Length Field Comment
0 1 EEPROM version
1 1 options
2 1 run on time 15s/1s increments

Options bits

Bits Use Comment
0 fast 1s increments
1 invoverride invert override sense