Estimating the voltage impressed on the tuning capacitor of a small transmitting loop

The ‘net abounds with calculators for design of small transmitting loops (STL), and most estimate the voltage impressed on the tuning capacitor. Most of these calculators give an incorrect estimate.

This article describes a measurement based approach to estimating the capacitor voltage for a STL.

Theory

Most of the loss in a well implemented STL is in the main loop circuit, and that can be well approximated by a series equivalent circuit consisting of the loop's inductive reactance (Xl) in series with an equal capacitive reactance (Xc) and equivalent total series resistance Rs. The ratio Xl/Rs=Xc/Rs=Q.

Another representation is as a parallel equivalent circuit with the loop inductor, capacitor, and equivalent parallel resistance Rp all in parallel. The ratio Rp/Xl=Rp/Xc=Q.

The latter relationship gives a method for estimating voltage across Xc. Since P=Erms^2/R, we can find the voltage across Rp by Erms=(P*Rp)^0.5 and substituting for Rp, Erms=(P*Q*Xl)^0.5. Since Epk=2^0.5*Erms for a sine wave, we can write Epk=(2*P*Q*Xl)^0.5.

In practice

We will follow these steps:

  1. Xl;
  2. find Q; and
  3. Calculate Epk at given power.

Find Xl

We can reliably calculate the inductance of a STL from a formula, or use direct measurement of the loop using a suitable antenna analyser or VNA. From that, Xl=2*pi*f*L.

For example, the inductance of a circular loop of 3.75m perimeter of 8mm diameter copper tube is 3.75µH, and at 4MHz Xl=94.3Ω.

Find Q

Measure the half power bandwidth of the completed and matched antenna.

Here is an example measurement made of a STL using an AA-600 analyser

Screenshot - 28_05_2014 , 10_10_54

Above is the VSWR plot from the AA-600. VSWR=2.6 bandwidth corresponds to the half power bandwidth of the loop itself. Measured bandwidth is 30kHz.

Calculate Q=fc/BW=4000/30=133.3.

Calculate Epk at given power

Lets calculate Epk for 20W input power.

Epk=(2*P*Q*Xl)^0.5=(2*20*133.3*94.3)^0.5=709Vpk.

This is the working voltage, you would choose a capacitor of somewhat higher rating.

You could use the actual capacitor breakdown rating less safety margin to find safe maximum power for the capacitor, so lets say you procured a 1800V capacitor and don't want to stress it beyond 1200V, rearranging the formula give earlier you can calculate Pmax=Epk^2/(2*Q*Xl)=1200^2/(2*133.3*94.3)=57W.

Reconciliation

We can learn from experiments that don't quite go to plan.

Does your loop implementation reconcile with the design tool you used?

Why?